The fab-to-OSAT glossary.

A

Abatement

Equipment that treats the exhaust of process tools, destroying or capturing hazardous gases before they reach the facility exhaust. It normally sits in the sub-fab.

Advanced packaging

Packaging methods that connect dies at a much finer pitch than wire bonding, or put several dies in one package: flip-chip, fan-out wafer-level packaging, 2.5D interposers and 3D stacking.

AEC-Q100Automotive Electronics Council qualification

The stress-test qualification standard for packaged integrated circuits used in vehicles. Automotive customers commonly require it of their assembly and test suppliers.

AMHSAutomated Material Handling System

The overhead and floor-level transport that moves wafer carriers between tools and stockers inside a fab.

ATEAutomatic Test Equipment

The tester that applies electrical signals to a chip and decides pass or fail, used at wafer sort and at final test.

ATMPAssembly, Testing, Marking and Packaging

The back-end stage that turns finished wafers into packaged, tested and marked chips. The work is the same as in an OSAT; the term is usually applied to a facility a company runs for its own products.

B

Back-end manufacturing

Everything after the wafer leaves the fab: dicing, die attach, interconnect, encapsulation, test and marking. Not the same thing as BEOL.

BEOLBack End of Line

The part of wafer processing that builds the metal interconnect layers above the transistors.

Blue-collar roles

Shop-floor production roles that work to defined procedures: production and assembly operators, material handlers, tool move-in crews and line support staff.

Build-operate-transferBOT

A workforce model in which a provider recruits and runs a team for a client for a set period, then transfers the team to the client’s payroll.

Bulk gases

Gases a fab uses in large volume, such as nitrogen, oxygen, argon and hydrogen, usually supplied by pipeline or on-site generation.

Bumping

Forming small solder or copper bumps on the pads of a wafer so that dies can be mounted face-down as flip-chips.

Burn-in

A screen in which chips are run at raised temperature and voltage to bring out early-life failures before shipment.

C

Cleanroom

A controlled space in which airborne particles, temperature, humidity and pressure are held within tight limits. Cleanliness is classified by ISO 14644-1 class.

CMPChemical Mechanical Planarisation

A polishing step that flattens the wafer surface between layers, using a slurry and a pad.

Compound semiconductor

A semiconductor made from two or more elements, such as silicon carbide (SiC) or gallium nitride (GaN). Widely used in power and radio-frequency devices.

Cycle time

The elapsed time for a lot to travel from wafer start to completion. The main measure of how fast a fab moves product.

D

Dicing

Cutting a finished wafer into individual dies. Also called singulation.

Die

A single chip on a wafer, before it is packaged. Plural: dies or dice.

Die attach

The assembly step that fixes a die to its leadframe or substrate.

DLI schemeDesign Linked Incentive

A Government of India scheme that supports domestic chip-design companies with financial incentives and design-infrastructure support.

E

EDAElectronic Design Automation

The software used to design, simulate and verify integrated circuits.

Excursion

An unplanned shift in a process or in defect levels that puts product at risk. It needs containment first and a root-cause fix second.

F

FabFabrication plant

A facility where wafers are processed into chips. Also called a wafer fab or front-end fab.

Fabless

A company that designs chips and has them manufactured by a foundry and an OSAT.

FDCFault Detection and Classification

Software that watches tool sensor data during each run and flags or stops runs that behave abnormally.

Final test

The electrical test of a packaged device before it ships.

Flip-chip

A package in which the die is mounted face-down and connected through bumps instead of bond wires.

Foundry

A fab that manufactures chips designed by other companies.

FOUPFront Opening Unified Pod

The sealed carrier that holds 300 mm wafers and docks with process tools.

Front-end manufacturing

Wafer fabrication: all processing done on the wafer inside the fab.

G

Grey-collar roles

Skilled, hands-on technical roles between engineer and operator: process, equipment, facilities and maintenance technicians, quality inspectors and test technicians.

H

Hook-up

Connecting an installed tool to its utilities (power, process gases, chemicals, ultrapure water, exhaust and vacuum) so that it can be started up.

I

IATF 16949

The quality-management-system standard of the automotive industry. Often required of assembly and test suppliers that serve automotive customers.

IDMIntegrated Device Manufacturer

A company that both designs and manufactures its own chips.

ISMIndia Semiconductor Mission

The Government of India body, under the Ministry of Electronics and Information Technology, that administers the country’s semiconductor and display manufacturing programmes.

K

Known good dieKGD

A bare die that has been tested to the quality level of a packaged part, so that it can be used safely in a multi-die package.

L

Leadframe

The metal frame that carries the die and forms the leads of many package types.

Lithography

The process step that transfers a circuit pattern onto the wafer using light and a photosensitive resist.

Lot

A group of wafers, or of packaged units, processed together and tracked as one unit.

M

MESManufacturing Execution System

The software that tracks every lot, enforces the process route and records what was done at each step.

Metrology

Measurement of what was made: film thickness, critical dimension, overlay and other parameters.

Mold compound

The epoxy material that encapsulates the die and wires in a plastic package.

N

NPINew Product Introduction

The work of bringing a new device or package from engineering samples to qualified production.

O

OEEOverall Equipment Effectiveness

A measure of how well a tool is used: availability multiplied by performance multiplied by quality.

OSATOutsourced Semiconductor Assembly and Test

A company that assembles, packages and tests chips as a service for other companies.

P

PDKProcess Design Kit

The set of files a foundry gives designers that describes its process: device models, design rules and layout cells.

Physical design

Turning a verified circuit description into manufacturable layout: floorplanning, placement, clock-tree synthesis, routing and sign-off.

Q

Qualification

Showing with data that a tool, process, material, supplier or product meets its specification before it is used for production.

R

Ramp

The period in which a line’s output rises from first lots to planned volume.

Recipe

The set of parameters a tool runs for a given process step.

S

Second source

A qualified alternative supplier for a material, part or service, kept so that one supplier’s problem does not stop the line.

SEMI S2

The industry guideline for environmental, health and safety aspects of semiconductor manufacturing equipment.

Skills matrix

A table of who is certified to do which task on which tool, at what level. The basis for shift cover and training plans.

SPCStatistical Process Control

Using control charts on process and measurement data to detect drift before it produces defects.

Specialty gases

Process gases used in smaller volumes and at high purity, many of them toxic, corrosive or flammable, for steps such as etch, deposition and doping.

Sub-fab

The level beneath the cleanroom that houses pumps, abatement, chillers and the gas and chemical distribution that serve the tools above.

Substrate

In packaging, the laminate or ceramic base on which a die is mounted and which carries its connections to the board. In wafer processing, the wafer itself.

T

Tape-out

The release of a finished chip design to the foundry for manufacturing.

Technology transfer

Moving a qualified process or product from one site or company to another, with the documents, training and matching data needed to reproduce it.

Tool move-in

Delivering a piece of equipment into the cleanroom and positioning it on its pedestal, before hook-up.

U

UPWUltrapure Water

Water purified to extremely low levels of ions, particles and organics, used to rinse wafers.

W

Wafer

A thin, polished slice of semiconductor, most often silicon, on which chips are built.

Wafer sort

The electrical test of every die on a wafer before dicing. Also called wafer probe.

White-collar roles

Engineering, design and management roles: process, equipment and design engineers, technical architects and project managers.

WIPWork in progress

Lots that have started but not finished. How WIP is spread across the line largely decides cycle time.

Wire bonding

Connecting the pads of a die to its package with fine gold, copper or aluminium wire.

Y

Yield

The fraction of good units. Line yield counts wafers that survive processing, sort yield counts good dies per wafer, and final-test yield counts good packaged parts.