From sand to shipped chip: the whole journey on one page.

Fifteen steps in two kinds of factory. The front-end builds the chip; the back-end makes it usable.

In brief
  • Silicon is grown as a crystal, sliced into wafers and polished.
  • The fab builds the chip in layers: deposit, pattern, etch, implant, polish, inspect, repeat.
  • Every die is tested on the wafer before it leaves the fab.
  • OSAT or ATMP lines cut, connect, seal and test each chip.

Most conversations about new capacity use the words fab, OSAT and ATMP without showing what happens inside them. Here is the route a chip takes, as a single diagram.

Front-end In the wafer fab

  1. 01WaferA polished slice of a silicon crystal.
  2. 02Design and masksThe chip’s layers, drawn as photomasks.
  3. 03DepositA thin film is grown or laid down.
  4. 04PatternLithography prints the layer’s pattern.
  5. 05EtchUnprotected material is removed.
  6. 06ImplantIons change the silicon’s properties.
  7. 07PolishThe surface is flattened for the next layer.
  8. 08InspectEvery layer is measured and checked.
  9. 09Wafer sortEvery die is tested before it leaves.

Steps 03 to 08 repeat for every layer of the chip, dozens of times, before wafer sort.

Back-end In the OSAT or ATMP line

  1. 01Grind and diceThe wafer is thinned and cut into dies.
  2. 02Die attachGood dies are fixed to a frame or substrate.
  3. 03InterconnectWire bonds or bumps make the connections.
  4. 04MoldThe assembly is sealed in compound.
  5. 05Final testEach packaged part is tested, some after burn-in.
  6. 06Mark and shipMarked, inspected, packed, shipped.
Fig. 01The route a chip takes. The lit station steps along each line, like a lot moving from tool to tool.

The front-end: a loop, not a line

Steps 03 to 08 are not done once. Each layer of the chip goes through deposition, patterning, etch and the rest, and the next layer is built on top. A modern chip needs dozens of these loops. That is why wafer processing takes weeks and why a single mis-step can scrap work that took a long time to build.

The hand-over: wafer sort

Before a wafer leaves the fab, a prober touches every die and tests it. Failing dies are marked, and the result is a bin map: a picture of where the wafer lost yield. How bin maps are read.

The back-end: connect, protect, prove

In an OSAT or ATMP line the wafer is thinned and cut, good dies are attached to a frame or substrate, connected by wire or bumps, sealed in compound and tested again as finished parts. Wire bond or flip-chip explains the two main ways to connect a die.

Where people make the difference

Every station needs operators to run it, technicians to keep it in specification and engineers to improve it. Planning those people station by station is the work of our talent practice.

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